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AlesH Član

Pridružen-a: Pon 20 Mar 2006 21:20 Prispevkov: 16 Aktiv.: 0.07
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Objavljeno: Pet Jun 22, 2007 2:12 pm Naslov sporočila: Izvajanje funkcije iz RAM-a |
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Pozdravljeni
Zanima me, ce ima kdo morda izkusnej z izvajanjem funkcij iz RAM-a. Uporabljam GCC compiler. Poizkusal sem z:
Koda: |
void FastSPIRead(void) __attribute__((section(".data")));
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Vrjetno je potrebna se kaksna sprememba v strat-up kodi. Startup file je naslednji:
Koda: |
/**************************************************************************************/
/* Startup code. First adderss. */
/**************************************************************************************/
.text
.arm
.global _start
.global main
.func _start
_start:
/* Program signature explanation: */
/* Interrupt vector table is 32 bytes long (eight 32-bit instructions). The sixth */
/* instruction is a 32-bit constant named program signature. It must be a 32-bit */
/* number such that the eight 32-bit instruction codes from interrupt vector */
/* table produce zero when they are added together (without carry). */
/* The signature remains unchanged if the interrupt service routine addresses are */
/* listed in a separate table (interrupt address table). */
/* Interrupt vector table */
LDR PC, Reset_Addr
LDR PC, Undefined_Addr
LDR PC, Swi_Addr
LDR PC, Prefetch_Addr
LDR PC, Abort_Addr
NOP /* Reserved Vector */
# LDR PC, Irq_Addr
LDR PC, [PC,#-0x0FF0] /* Vector from VicVectorAddr */
LDR PC, Fiq_Addr
/* Interrupt address table */
/* Replace the handler address with C routine name if you want to */
/* use some other function that handles an interrupt. */
Reset_Addr: .word Reset_Handler
Undefined_Addr: .word Undefined_Except
Swi_Addr: .word Swi_Except
Prefetch_Addr: .word Prefetch_Except
Abort_Addr: .word Abort_Except
.word 0x00000000 /* Reserved four bytes */
Irq_Addr: .word Irq_Except
Fiq_Addr: .word Fiq_Except
/* Default interrupt service routines. */
/* Hang the system in case of an interrupt. */
Undefined_Except: B Undefined_Except
Swi_Except: B Swi_Except
Prefetch_Except: B Prefetch_Except
Abort_Except: B Abort_Except
Irq_Except: B Irq_Except
Fiq_Except: B Fiq_Except
/**************************************************************************************/
/* Reset Handler */
/**************************************************************************************/
Reset_Handler:
/*
value = 0 ... VPB clock is 1/4 of the processor CCLK clock
*/
/* VPB Setup */
LDR R0, =VPBDIV
LDR R1, =VPBDIV_Val
STR R1, [R0] /*Store R1 in R0*/
/* Setup Stack for each mode */
LDR R0, =TOP_Stack
/* Enter Undefined Instruction Mode and set its Stack Pointer */
MSR CPSR_c, #MODE_UND|I_BIT|F_BIT /* Set UND stack pointer */
MOV SP, R0
SUB R0, R0, #UND_Stack_Size
/* Enter Abort Mode and set its Stack Pointer */
MSR CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Set ABT stack pointer */
MOV SP, R0
SUB R0, R0, #ABT_Stack_Size
/* Enter FIQ Mode and set its Stack Pointer */
MSR CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* Set FIQ stack pointer */
MOV SP, R0
SUB R0, R0, #FIQ_Stack_Size
/* Enter IRQ Mode and set its Stack Pointer */
MSR CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* Set IRQ stack pointer */
MOV SP, R0
SUB R0, R0, #IRQ_Stack_Size
/* Enter Supervisor Mode and set its Stack Pointer */
MSR CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Set SVC stack pointer */
MOV SP, R0
SUB R0, R0, #SVC_Stack_Size
/* Enter User or system Mode and set its Stack Pointer*/
MSR CPSR_c, #MODE_USR /* Set SYS stack pointer */
MOV SP, R0
/*Setup a default Stack Limit (SL-R10) (when compiled with "-mapcs-stack-check")*/
SUB SL, SP, #USR_Stack_Size
/**************************************************************************************/
/* Relocate .data section (Copy form ROM to RAM).
/**************************************************************************************/
LDR R1, =_etext
LDR R2, =_data
LDR R3, =_edata
LoopRel: CMP R2, R3
LDRLO R0, [R1], #4
STRLO R0, [R2], #4
BLO LoopRel
/**************************************************************************************/
/* Clear bss RAM section. */
/**************************************************************************************/
MOV R0, #0
LDR R1, =__bss_start__
LDR R2, =__bss_end__
LoopZI: CMP R1, R2
STRLO R0, [R1], #4
BLO LoopZI
/**************************************************************************************/
/* Enter C main function. */
/**************************************************************************************/
B main
.size _start, . - _start
.endfunc
.end
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Ce komu kaj podobnega deluje, bi ga prosil da pripne svoj startup. Hvala.
Bp Ales |
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Nazaj na vrh |
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Hi-End Član


Pridružen-a: Sre 25 Feb 2004 11:51 Prispevkov: 284 Aktiv.: 1.20 Kraj: Višnja Gora
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Objavljeno: Pet Jun 22, 2007 2:33 pm Naslov sporočila: |
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Na eni strani sem našel tole:
Citiram: |
Run selected Functions in RAM with arm-elf-gcc
This example-application demonstrates how to set-up the compiler and linker to execute selected functions from RAM. Shown in this example:
* Declare functions in RAM (section attribute)
* Declare functions to be called by a "long-call" (long-call attribute)
* Linker-script-entries for the "function-section"
* Startup-code which transfers the function-code from ROM to RAM
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http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/#gcc_ramfunc
Če ti to kaj koristi. V Keilovem prevajalniku je zadeva zelo enostavna __ram
Bi pa tudi mene zanimalo kako se temu streže, ker na embeddedrelated je že nekdo nekaj spraševal na to temo.
http://www.embeddedrelated.com/groups/lpc2000/show/5031.php in to verjetno tudi že poznaš. _________________ Music is a part of my life, DIY is my life ! |
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alessio Član

Pridružen-a: Pon 04 Dec 2006 8:39 Prispevkov: 363 Aktiv.: 1.61 Kraj: Ljubljana
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Objavljeno: Tor Jun 26, 2007 10:03 am Naslov sporočila: |
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V tem članku je opisano na kratko tudi izvajanje funkcij iz RAM-a, na koncu so linki na primere.
Aleš |
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